الخطوط العريضة للقسم
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رابط المحاضرة التعويضية 17-7-2024 الساعة 9-11 مساءا
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Office Hours
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Please solve and submit the TMA before the end of 8-8-2024
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Please submit your TMA before the end of 8-8-2024.
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MTA Fall 2023
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MTA Make-up_Fall2023
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MTA Spring 23-24
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Final_Fall 2023
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Final Spring 23-24
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Chapter 1:
1.1-1.3 Overview
1.4- Standard Organization
1.6- The Computer Level Hierarchy
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Chapter 2
2.1- Introduction
2.2 Positional Numbering System
2.3- Converting between bases
2.4- Signed Integer Representation
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Chapter 2
2.5- Floating - Point Representation
2.5.1- A simple model
2.5.2- Floating point arithmetic
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Chapter 3:
3.1- Introduction
3.2- Boolean Algebra
3.2.1 Boolean Expressions
3.2.2 (truth table only)
3.2.4 Complements
3.2.5 Representing Boolean Functions
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Chapter 3:
3.3- Logic gates
3.3.1 Symbols for logic Gates
3.3.2 Universal Gates
3.3.3 Multiple input gates
3.4- Digital Components
3.4.1 Digital Circuits and Their Relationship to Boolean Algebra
3.4.2 Integrated Circuits
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Please see the record for Ch3 because this chapter is important for MTA.
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Chapter 3:
3.5- Combinational Circuits
3.5.1 Basic Concepts
3.5.2- Examples Of Typical
3.6 Sequential Circuits
3.A K-maps
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Chapter 4:
4.1, 4.2, 4.3
4.6 Memory Organization and Addressing 4.8- MARIE
4.8.1 The Architecture
4.8.2 Registers and Buses
4.8.3 Instruction Set Architecture
4.8.4 Register Transfer Notation
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This Lecture is important for the TMA
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Chapter 4:
4.9 Instruction Processing
4.9.1 and 4.9.2
4.9.3 MARIE’s I/O
4.10 A Simple Program
4.11 Discussion
4.12 Extended our IS
5.4.2 Addressing Modes
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Chapter 5 Addressing modes
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Chapter 6:
6.1- Introduction
6.2- Types of Memory
6.3- The Memory Hierarchy
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Chapter 6:
6.4 CACHE Memory
6.4.1- Cache Mapping Schemes
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Cover any remaining material